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Add signal numbers

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This commit is contained in:
Aviv Palivoda
2019-07-31 19:48:47 +03:00
parent a1af6b4d6c
commit 56b555b905
1 changed files with 31 additions and 0 deletions
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31
vm/src/stdlib/signal.rs
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@@ -122,5 +122,36 @@ pub fn make_module(vm: &VirtualMachine) -> PyObjectRef {
"alarm" => ctx.new_rustfunc(alarm),
"SIG_DFL" => sig_dfl,
"SIG_IGN" => sig_ign,
"SIGHUP" => ctx.new_int(signal::Signal::SIGHUP as u8),
"SIGINT" => ctx.new_int(signal::Signal::SIGINT as u8),
"SIGQUIT" => ctx.new_int(signal::Signal::SIGQUIT as u8),
"SIGILL" => ctx.new_int(signal::Signal::SIGILL as u8),
"SIGTRAP" => ctx.new_int(signal::Signal::SIGTRAP as u8),
"SIGABRT" => ctx.new_int(signal::Signal::SIGABRT as u8),
"SIGBUS" => ctx.new_int(signal::Signal::SIGBUS as u8),
"SIGFPE" => ctx.new_int(signal::Signal::SIGFPE as u8),
"SIGKILL" => ctx.new_int(signal::Signal::SIGKILL as u8),
"SIGUSR1" => ctx.new_int(signal::Signal::SIGUSR1 as u8),
"SIGSEGV" => ctx.new_int(signal::Signal::SIGSEGV as u8),
"SIGUSR2" => ctx.new_int(signal::Signal::SIGUSR2 as u8),
"SIGPIPE" => ctx.new_int(signal::Signal::SIGPIPE as u8),
"SIGALRM" => ctx.new_int(signal::Signal::SIGALRM as u8),
"SIGTERM" => ctx.new_int(signal::Signal::SIGTERM as u8),
"SIGSTKFLT" => ctx.new_int(signal::Signal::SIGSTKFLT as u8),
"SIGCHLD" => ctx.new_int(signal::Signal::SIGCHLD as u8),
"SIGCONT" => ctx.new_int(signal::Signal::SIGCONT as u8),
"SIGSTOP" => ctx.new_int(signal::Signal::SIGSTOP as u8),
"SIGTSTP" => ctx.new_int(signal::Signal::SIGTSTP as u8),
"SIGTTIN" => ctx.new_int(signal::Signal::SIGTTIN as u8),
"SIGTTOU" => ctx.new_int(signal::Signal::SIGTTOU as u8),
"SIGURG" => ctx.new_int(signal::Signal::SIGURG as u8),
"SIGXCPU" => ctx.new_int(signal::Signal::SIGXCPU as u8),
"SIGXFSZ" => ctx.new_int(signal::Signal::SIGXFSZ as u8),
"SIGVTALRM" => ctx.new_int(signal::Signal::SIGVTALRM as u8),
"SIGPROF" => ctx.new_int(signal::Signal::SIGPROF as u8),
"SIGWINCH" => ctx.new_int(signal::Signal::SIGWINCH as u8),
"SIGIO" => ctx.new_int(signal::Signal::SIGIO as u8),
"SIGPWR" => ctx.new_int(signal::Signal::SIGPWR as u8),
"SIGSYS" => ctx.new_int(signal::Signal::SIGSYS as u8),
})
}