From 5b670f8a26e588b0e4f28cd258e50d86378aba77 Mon Sep 17 00:00:00 2001
From: Aviv Palivoda <palaviv@gmail.com>
Date: Mon, 29 Jul 2019 18:39:26 +0300
Subject: [PATCH] Simplify signal code

---
 vm/src/vm.rs | 7 ++-----
 1 file changed, 2 insertions(+), 5 deletions(-)

diff --git a/vm/src/vm.rs b/vm/src/vm.rs
index 07b2831933..15978d4c0f 100644
--- a/vm/src/vm.rs
+++ b/vm/src/vm.rs
@@ -179,7 +179,7 @@ impl VirtualMachine {
             trace_func,
             use_tracing: RefCell::new(false),
             settings,
-            signal_handlers: RefCell::new(HashMap::new()),
+            signal_handlers: Default::default(),
         };
 
         builtins::make_module(&vm, builtins.clone());
@@ -1169,10 +1169,7 @@ impl VirtualMachine {
             if *signum as usize >= NSIG {
                 panic!("Signum bigger then NSIG");
             }
-            let triggerd;
-            unsafe {
-                triggerd = TRIGGERS[*signum as usize].swap(false, Ordering::Relaxed);
-            }
+            let triggerd = unsafe { TRIGGERS[*signum as usize].swap(false, Ordering::Relaxed) };
             if triggerd {
                 self.invoke(handler.clone(), vec![]).expect("Test");
             }